- Industry benchmark for tungsten film productivity
- Nucleation layer formed using Lam’s Pulsed Nucleation Layer (PNL) ALD process and in-situ bulk CVD fill enabled by patented Multi-Station Sequential Deposition (MSSD) architecture
- Lower overall resistivity of thin W films using ALD to reduce thickness and alter CVD bulk fill grain growth
- Low-fluorine, low-stress W fill for advanced 3D NAND and DRAM
- High step coverage with reduced thickness (relative to conventional barrier) films by using ALD in the deposition of WN films
- Concept Two® ALTUS®
- ALTUS® Max
- ALTUS® Max ExtremeFill™
- ALTUS® DirectFill™ Max
- ALTUS® Max ICEFill®
- ALTUS® LFW
- Tungsten plug, contact, and via fill
- 3D NAND wordlines
- Low-stress composite interconnects
- WN barrier for via and contact metallization
ALTUS Product Family
Products
Atomic Layer Deposition (ALD) Chemical Vapor Deposition (CVD)
Tungsten deposition is used to form conductive features like contacts, vias, and plugs on a chip. These features are small, often narrow, and use only a small amount of metal, so minimizing resistance and achieving complete fill can be difficult. At these nanoscale dimensions, even slight imperfections can impact device performance or cause a chip to fail.
Lam’s market-leading ALTUS® systems combine CVD and ALD technologies to deposit the highly conformal films needed for advanced tungsten metallization applications. For some applications, select models are also available through our Reliant® Systems as refurbished products, providing lower cost of ownership with the same quality assurance and performance as new systems.
Industry Challenges
As semiconductor manufacturers move to smaller technology nodes, tungsten contact metallization processes face significant scaling and integration challenges, such as minimizing contact resistance to meet the lower power consumption and high speed requirements of advanced devices. For nanoscale structures, complete fill with tungsten (W) using conventional CVD is limited by overhang from conventional barrier films and deposition techniques. This results in closure of the feature opening before complete fill can take place, leading to voids, higher resistance, and contact failure. Even completely filled smaller features contain less tungsten, which results in higher contact resistance. Advanced memory and logic features require deposition techniques that enable complete, defect-free tungsten fill, while reducing resistivity of the bulk tungsten. Good barrier step coverage and lower resistivity at reduced thicknesses (relative to physical vapor deposition/CVD barrier films) is needed to improve contact fill and reduce contact resistance.